INTRODUCTORY VHDL FROM SIMULATION TO SYNTHESIS (Record no. 29901)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00267nam a2200097Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 150310s9999 xx 000 0 und d |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | SUDHAKAR YALAMANCHILI |
| 245 ## - TITLE STATEMENT | |
| Title | INTRODUCTORY VHDL FROM SIMULATION TO SYNTHESIS |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1 |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Date of publication, distribution, etc. | 2004 |
| Name of publisher, distributor, etc. | PEARSON EDUCATION |
| Withdrawn status | Lost status | Damaged status | Not for loan | Permanent Location | Current Location | Shelving location | Date acquired | Cost, normal purchase price | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| NSS COLLEGE OF ENGINEERING | NSS COLLEGE OF ENGINEERING | BOOK BANK STACK AREA | 2015-03-28 | 0.00 | 621.392 YAL BB | 46620 | 2015-03-28 | 2015-03-28 | BOOK BANK |